Integrated FPGA and GPGPU Based Video Processing Electronics for Multi-Sensor Imaging System
Office of Dg (ecs) · Electronics & Instrumentation · open
Key facts
- EMD: ₹29K
- Published: 18 Sep 2026
- Closing date: 09 Oct 2026
- Status: open
- Ministry: Ministry of Defence
- Department: Department of Defence Research & Development
Description
Tender for procurement of 2 units of integrated FPGA and GPGPU based video processing electronics for multi-sensor imaging system, issued by the Ministry of Defence, Department of Defence Research & Development, Office of Dg (ecs). Bid validity is 90 days from the end date, with bid opening scheduled for 10-10-2026. The project involves electronics for multi-sensor imaging, with specifications and technical details available in the specification document.
Eligibility & requirements
- Startup relaxation: Yes
- MSE relaxation: Yes
- Documents required: Supporting documents for relaxation from experience and turnover criteria
New to these terms? Read how tender eligibility criteria work.
Commercial terms
- Bid type: Packet Bid
- Evaluation: value wise evaluation
- Make in India (MII): Yes
- MSE preference: Yes
Line items (1)
- Integrated FPGA and GPGPU Based Video Processing Electronics for Multi-Sensor Imaging System — Qty: 2 Nos
1 tender document(s) available — sign up to download.
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