FPGA Development and Evaluation Board
National Institute of Technology (NIT) · Calicut, Kerala · Electronics & Instrumentation · open
Key facts
- Tender value: ₹4.0L
- Published: 29 Sep 2026
- Closing date: 20 Oct 2026
- Status: open
- Ministry: Ministry of Education
- Department: Department of Higher Education
Description
Tender for supply, installation, testing, commissioning, and training of FPGA Development and Evaluation Boards, with a total quantity of 2 units, specifications including processor, GPU, memory, and programmable logic, to be supplied to the National Institute of Technology Calicut under the Department of Higher Education, Ministry of Education.
Eligibility & requirements
- Experience required: 3 years
- Past performance: 30%
- Startup relaxation: Yes
- MSE relaxation: Yes
- Certifications: ISO, BIS, type test certificates
- Documents required: Contracts and delivery certificates, OEM authorization
New to these terms? Read how tender eligibility criteria work.
Commercial terms
- Bid type: Packet Bid
- Evaluation: value wise evaluation
- Make in India (MII): Yes
- MSE preference: Yes
Line items (1)
- FPGA Development and Evaluation Board — Qty: 2 piece
1 tender document(s) available — sign up to download.
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