FPGA Development and Evaluation Board
National Institute Of Technology (nit) · Raipur, Chhattisgarh · Electronics & Instrumentation · open
Key facts
- Published: 10 Aug 2026
- Closing date: 26 Aug 2026
- Status: open
- Ministry: Ministry Of Education
- Department: Department Of Higher Education
- Office: Raipur
Description
Tender for the procurement of FPGA Development and Evaluation Boards with specified technical parameters, relaxation provisions for MSEs and startups, and detailed bid process and evaluation criteria.
Eligibility & requirements
- Startup relaxation: Yes
- MSE relaxation: Yes
- Documents required: Supporting documents for MSE/Startup relaxation
Commercial terms
- Bid type: Two Packet Bid
- Evaluation: value wise evaluation
- Make in India (MII): No
- MSE preference: Yes
Line items (1)
- FPGA Development and Evaluation Board — Qty: 4 Nos
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