FPGA Development and Evaluation Board
Directorate Of Technical Education · Gujarat · Computers & IT Hardware · open
Key facts
- Tender value: ₹2.2L
- Published: 20 Jun 2026
- Closing date: 11 Jul 2026
- Status: open
- Department: Education Department Gujarat
- Office: Gecsurat
Description
Tender for procurement of FPGA Development and Evaluation Board with specific technical specifications and requirements.
Eligibility & requirements
- Experience required: 1 years
- Startup relaxation: Yes
- MSE relaxation: Yes
- Documents required: Experience Criteria, Bidder Turnover, Certificate (Requested in ATC), Additional Doc 1 (Requested in ATC)
Commercial terms
- Bid type: Two Packet Bid
- Evaluation: value wise evaluation
- Make in India (MII): Yes
- MSE preference: Yes
Line items (1)
- FPGA Development and Evaluation Board — Qty: 4 pieces
1 tender document(s) available — sign up to download.