Firmware Post Integration Stabilization and Release of System Readiness
Office of Dg (ecs) · Electronics & Instrumentation · open
Key facts
- EMD: ₹1.2L
- Published: 15 Jul 2026
- Closing date: 25 Jul 2026
- Status: open
- Ministry: Ministry of Defence
- Department: Department of Defence Research & Development
Description
Tender for firmware post integration stabilization, system readiness, IoT sensor-based measurement, and rural water supply monitoring systems, including FPGA development and evaluation board, with a bid validity of 120 days, issued by the Ministry of Defence, Department of Defence Research & Development, Office of Dg (ecs).
Eligibility & requirements
- Startup relaxation: Yes
- MSE relaxation: Yes
- Documents required: Turnover Criteria, Supporting documents for eligibility exemption
Commercial terms
- Bid type: Packet Bid
- Evaluation: value wise evaluation
- Make in India (MII): Yes
- MSE preference: Yes
Line items (1)
- Firmware Post Integration Stabilization and Release of System Readiness — Qty: 1 1
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